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Prakash Murali
I am an associate professor in the Department of Computer Science, Cambridge University.
My research interests include quantum architecture, resource estimation and compilation.
I was previously a quantum architect in Microsoft where I designed the Azure Quantum Resource Estimator.
I graduated with a Computer Science Ph.D. from Princeton University in 2021. My work has been adopted by several industry compilers,
influenced quantum system architecture and industry benchmarking practices. I won
the ACM SIGARCH/IEEE CS TCCA Outstanding Dissertation Award (2022), Communications of ACM Research Highlights (2022),
an IBM PhD fellowship (2021) and an IEEE Micro Top Picks award (2019).
I am looking for PhD students to join my group. I have an open position for a Dowling Postdoctoral Fellow.
Email
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Publications
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Understanding the Scalability of Circuit Cutting Techniques for Practical Quantum Applications.
S. Yang, P. Murali
arXiv:2411.17756, 2024
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Utilizing resource estimation for the development of quantum computing applications.
N. Quetschlich, M. Soeken, P. Murali, R. Wille
IEEE International Conference on Quantum Computing and Engineering (QCE), 2024
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Assessing requirements to scale to practical quantum advantage.
M. E. Beverland, P. Murali, M. Troyer, K. M. Svore, T. Hoefler, V. Kliuchnikov, G. H. Low, M. Soeken, A. Sundaram, A. Vaschillo
arXiv preprint arXiv:2211.07629, 2022
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Enabling Practical Quantum Computation: Compiler and Architecture Techniques for Bridging the Algorithms-to-Devices Resource Gap
P. Murali
Princeton University Doctoral Dissertation 2021
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TimeStitch: Exploiting slack to mitigate decoherence in quantum circuits.
K. N. Smith, G. S. Ravi, P. Murali, J. M. Baker, N. Earnest, A. J. Abhari, F. T. Chong
ACM Transactions on Quantum Computing, 2022
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Toward systematic architectural design of near-term trapped ion quantum computers.
P. Murali, D. M. Debroy, K. R. Brown, M. Martonosi
Communications of the ACM, Research Highlights, 2022
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Adaptive job and resource management for the growing quantum cloud.
G. S. Ravi, K. N. Smith, P. Murali, F. T. Chong
IEEE International Conference on Quantum Computing and Engineering (QCE), 2021
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Designing Calibration and Expressivity-Efficient Instruction Sets for Quantum Computing.
L. Lao*,P. Murali*, M. Martonosi, and D. Browne. (*joint first authors)
International Symposium on Computer Architecture (ISCA), 2021
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Resource-Efficient Quantum Computing by Breaking Abstractions.
Y. Shi, P. Gokhale, P. Murali , J. M. Baker, C. Duckering, Y. Ding, N. C. Brown, C. Chamberland, A. J. Abhari, A. W. Cross, D. I. Schuster, K. R. Brown, M. Martonosi, and F. T. Chong.
In Proceedings of the IEEE, June 2020 (invited paper)
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Architecting Noisy-Intermediate Scale Quantum Computers: A Real-System Study
P. Murali, N. M. Linke, M. Martonosi, A. J. Abhari, N. H. Nguyen, C. H. Alderete.
IEEE Micro, 40 (3) Top Picks of the 2019 Computer Architecture Conferences, May-June 2020.
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Architecting Noisy Intermediate-Scale Trapped Ion Quantum Computers
P. Murali, D. Debroy, K. Brown and M. Martonosi
International Symposium on Computer Architecture (ISCA), 2020
Conference talk,
Benchmarks
Press: Examining trapped ion technology for next generation quantum computers, phys.org
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Software Mitigation of Crosstalk on Noisy Intermediate-Scale Quantum Computers
P. Murali, D. C. McKay, M. Martonosi and A. J. Abhari
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2020
Conference talk
Code: Qiskit CrosstalkAdaptiveSchedule pass
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Full-Stack, Real-System Quantum Computer Studies: Architectural Comparisons and Design Insights.
P. Murali, N. M. Linke, M. Martonosi, A. J. Abhari, N. H. Nguyen, C. H. Alderete.
International Symposium on Computer Architecture (ISCA), 2019.
Selected as one of the IEEE Micro Top Picks from computer architecture conferences of 2019.
Lightning talk
Code: TriQ compiler
Press: Researchers explore architectural design of quantum computers, phys.org
Press: Tests measure progress of quantum computers, Science (Vol. 364, Issue 6447)
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Noise-Adaptive Compiler Mappings for Noisy Intermediate-Scale Quantum Computers.
P. Murali, J. M. Baker, A. J. Abhari, F. T. Chong and M. Martonosi
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2019
Lightning talk,
Benchmarks
Code: Qiskit NoiseAdaptiveLayout pass
Press: Researchers use noise data to increase reliability of quantum computers, phys.org
Press: Greater Quantum Efficiency by Breaking Abstractions, SIGARCH blog
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Formal Constraint-based Compilation for Noisy Intermediate-Scale Quantum Systems
P. Murali, A. J. Abhari, F. T. Chong and M. Martonosi
Microprocessors and Microsystems, Special Issue on Quantum Computer Architecture: a full-stack overview. [Earlier version of ASPLOS 2019 paper]
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On Optimizing Distributed Tucker Decomposition for Sparse Tensors
(alphabetical) V. T. Chakaravarthy, J.W. Choi, D. J. Joseph, P. Murali, Y. Sabharwal, S. Shivmaran and D. Sreedhar
International Conference on Supercomputing (ICS) , 2018
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Improved Distributed Algorithm for Graph Truss Decomposition
(alphabetical) V. T. Chakaravarthy, A. Goyal, P. Murali, Y. Sabharwal, S. Shivmaran
European Conference on Parallel Processing (Euro-Par), 2018
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Metascheduling of HPC Jobs in Day-Ahead Electricity Markets
[post]
P. Murali and S. Vadhiyar
IEEE Transactions on Parallel and Distributed Systems (TPDS) Volume 29, Issue 3, pp. 614-627, 2018
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Coupling a Small Battery with a Datacenter for Frequency Regulation
R. B. Guruprasad, P. Murali, D. Krishnaswamy, S. Kalyanaraman
IEEE Power and Energy Society General Meeting (PES GM) , 2017
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On Optimizing Distributed Tucker Decomposition for Dense Tensors
(alphabetical) V. T. Chakaravarthy, D. J. Joseph, P. Murali, Y. Sabharwal and D. Sreedhar
IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2017
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Scalable Single Source Shortest Path Algorithms for Massively Parallel Systems
(alphabetical) V. T. Chakaravarthy, F. Checconi, P. Murali, F. Petrini and Y. Sabharwal
IEEE Transactions on Parallel and Distributed Systems (TPDS) Volume 28, Issue 7, pp. 2031-2045, 2017
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Qespera: an adaptive framework for prediction of queue waiting times in supercomputer systems
P. Murali and S. Vadhiyar
Concurrency and Computation: Practice and Experience, Volume 28, Issue 9, pp. 2685-2710, 2016
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Subgraph Counting: Color Coding Beyond Trees
(alphabetical) V. T. Chakaravarthy, M. Kapralov, P. Murali, F. Petrini, X. Que, Y. Sabharwal, B. Schieber
IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2016
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Metascheduling of HPC Jobs in Day-Ahead Electricity Markets
P. Murali and S. Vadhiyar
IEEE International Conference on High Performance Computing (HiPC), 2015
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Matching Application Signatures for Performance Predictions using a Single Execution
A. Jayakumar, P. Murali and S. Vadhiyar
IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2015
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